EDN

Gabe’s Commentary: Verilog, SystemVerilog, or both

Four years ago, as the semiconductor industry process technology crossed below 193 nanometers, the number of transistors available to a design team made it necessary to explore new design methods at a ...
EDN

IEEE approves SystemVerilog, revision of Verilog

SAN FRANCISCO — The IEEE Wednesday (Nov. 8) said it has approved standards for hardware description languages SystemVerilog and Verilog. The Verilog standard, IEEE 1364-2005, is a revision to the ...
Design-Reuse

AMIQ EDA Releases the DVT Debugger Add-On Module for the e language, SystemVerilog, Verilog, and VHDL

AMIQ EDA, a pioneer in integrated development environments (IDEs) for hardware design and verification and a provider of platform-independent software tools for efficient code development, today ...