EDN

FPGA PHY IP Design

This application note describes implementing and simulating the protocol-specific PHY intellectual property (IP) core in Stratix® V devices using the Interlaken PHY IP interface. You can use the ...
Embedded

Silex Insight achieves 100Gbps in FPGA for ChaCha20-Poly1305 IP core

Silex Insight has said it has achieved record-breaking speed for its ChaCha20-Poly1305 hardware crypto engine, managing 800Gbps in ASIC and 100Gbps in an FPGA. Its’ RFC7539 compliant intellectual ...
EDN

Is Your FPGA Design Reusable? (A Design Checklist)

Design and intellectual property (IP) reuse can improve the quality of your FPGA design, shorten your design and verification cycle and allow faster time-to-market. However, creating IP for design ...
Embedded

Basics of core-based FPGA design: Part 2 – System design considerations

There are a number of system design factors requiring consideration when implementing an FPGA processor. Some of those factors include the use of co-design, processor architectural implementation, ...
CU Boulder News & Events

FPGA Design for Embedded Systems Specialization

This online engineering specialization will help you gain proficiency in creating prototypes or products for a variety of applications using Field Programmable Gate Arrays (FPGAs). You will cover a ...
Electronic Design

Understanding FPGA Processor Interconnects

This file type includes high resolution graphics and schematics when applicable. FPGAs are wonderful tools. They consist of a collection of logic cells called lookup tables (LUTs) surrounded by an ...