EDN

Putting the R in RTL : Coding Registers in Verilog and VHDL

Many years ago, when I was a young man and the Boston Red Sox had just lost the 1986 world series, controversy stalked the land of hardward development. A new technology called Register Transfer ...
Hackaday

Learning Verilog For FPGAs: The Tools And Building An Adder

Over the last year we’ve had several posts about the Lattice Semiconductor iCEstick which is shown below. The board looks like an overgrown USB stick with no case, but it is really an FPGA development ...
Hackaday

FPGAs In C With Cynth

Programming an FPGA with Verilog looks a lot like programming. But it isn’t, at least not in the traditional sense. There have been several systems that aim to take C code and convert it into a ...
EDN

‘Obfuscators’ render Verilog, VHDL unreadable

Santa Cruz, Calif. — Providing a new approach to intellectual property (IP) protection, software engineering firm Semantic Designs has released production-quality “obfuscators” for Verilog 2001 and ...