Power-supply design becomes complicated when you’re faced with multiple conflicting specifications. One example is the design of a double-data-rate (DDR) memory supply for an automotive environment.

Download this article in PDF format. Today’s embedded systems require high external memory bandwidth to achieve fast boot time and application loading time with minimal cost. Historically, ...

The synchronous vs. asynchronous design debate erupts every now and then, usually when a vocal minority swears by asynchronous design, often claiming that asynchronous design delivers higher ...

Synchronous interfaces involve a single clock domain and are relatively easy to design. However, at times, it is advantageous and necessary to have an asynchronous interface between peripherals for ...

Maximizing energy efficiency and power density have now become requirements for power supply designs in low power chargers and adapters. It has become necessary for synchronous rectification (SR) to ...

In an era when power has become a fundamental design constraint, questions persist about whether asynchronous logic has a role to play. It is a design style said to have significant benefits and yet ...

As system-on-chip (SoC) designs grow larger, designers must grapple with serious global timing problems, the effect of wire loading and timing delays and the performance hit associated with supporting ...

Conventional chips are inefficient. Governed by a clock signal that wakes up every component with each tick, regardless of whether or not it is actually needed for the task at hand, they run at the ...

A lack of suitable design tools and the dominance of a design culture favouring synchronous design are the factors limiting the broader use of asynchronous, or clockless, technology in chips.