EDN

Embedded memory test and repair optimizes SoC yields

As process technologies continue to shrink and memory size and design complexity grow, it has become increasingly difficult to achieve high manufacturing yield. Embedded memories are the most dense ...
EDN

Synopsys announces hierarchical SoC test system

An automated platform for SoC (system-on-chip) test, the DesignWare Star Hierarchical System from Synopsys reduces test integration time by automatically creating a hierarchical network based on IEEE ...
Electronic Design

Tackling Next-Generation RF SOC Test

Developing an automated production test solution for current and next-generation complex RF SIP/SOC devices is an increasingly difficult task. Both the test program and the device interface board (DIB ...
Design-Reuse

SoC test requirements debated

BALTIMORE — The prevalence and escalating cost of system-on-chip (SoC) designs are forcing a reexamination of existing approaches to design and test, according to EDA and test industry executives at a ...
Yahoo Finance

Advantest Ships 10,000th V93000 SoC Test System

TOKYO, May 08, 2023 (GLOBE NEWSWIRE) -- Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857) today announced it has shipped its 10,000 th V93000 system-on-chip (SoC) test ...
Nasdaq

Advantest Introduces Evolutionary V93000 EXA Scale™ SoC Test System

TOKYO, Sept. 23, 2020 (GLOBE NEWSWIRE) -- Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857) has announced its next-generation V93000 testers targeted at advanced digital ...
Yahoo Finance

ISE Labs Chooses Advantest’s V93000 EXA Scale™ SoC Test System for Production Test Services

TOKYO, Nov. 13, 2023 (GLOBE NEWSWIRE) -- Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857) today announced that longtime customer ISE Labs (Fremont, Calif.) has purchased ...
Electronic Design

ATE for SOC Multisite Testing

Here�s what test engineers charged with production-level device testing need to know when specifying mixed-signal SOC test systems. Every semiconductor manufacturer faces continuing pressure to ...
DATAQUEST

Advantest unveils T2000 AiR2X air-cooled SoC and power analog test solution

RDK significantly reduces the effort required for program creation and debugging, contributing to shorter platform migration ...
Semiconductor Engineering

Best Practices For Multicore SoC Test And Debug

In increasingly complex SoC designs, many of which contain multiple cores and multiple modes, determining best practices for testing and debugging is a moving target. Jason Andrews, architect at ...
Semiconductor Engineering

Automotive Keyless Entry SoC Test Methodologies And Techniques

Passive Entry Passive Start (PEPS) technology has become standard in the automotive market for keyless operation. A secure wireless communication system, PEPS enables you to lock and unlock the ...