Semiconductor Engineering

FPGA-Based HW/SW Platform For Pre-Silicon Emulation Of RISC-V Designs (Barcelona Supercomputing Center)

A technical paper titled “Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs” was published by researchers at Barcelona Supercomputing Center and Universitat ...
Semiconductor Engineering

SW-HW Framework: Graphic Rendering on RISC-V GPUs (Georgia Tech, Cal Poly)

A new technical paper titled “Skybox: Open-Source Graphic Rendering on Programmable RISC-V GPUs” was published by researchers at Georgia Tech, California Polytechnic State University-San Luis Obispo.
Electronic Design

RISC-V RVA23—A Major Milestone

The 2024 RISC-V Summit North America marked a significant milestone for the RISC-V community with the ratification of the RVA23 Profile. This event signifies a major step forward in the evolution of ...
csis.org

What RISC-V Means for the Future of Chip Development

Many believe that the future of chip design—and the development of new technologies like next-generation artificial intelligence (AI)—will depend on RISC-V architecture. RISC-V is an open standard ...
Forbes

RISC-V’s Ascent Could Reshape The Global Compute Landscape

Forbes contributors publish independent expert analyses and insights. Dave Altavilla is a Tech Analyst covering chips, compute and AI. For decades, chip architectures have been dominated by a pair of ...