Despite being preferred by newly established companies that had the same needs for ISAs as their competition, they lacked the time and resources to deal with costly, complex proprietary ISAs. While ...

Ventana Micro Systems Inc. today debuted a new data center processor, the Veyron V1, that’s based on the open-source RISC-V instruction-set architecture. Ventana claims that the Veyron V1 is the first ...

RISC-V vendors are beginning to aim much higher in the compute hierarchy, targeting data centers and supercomputers rather than just simple embedded applications on the edge. In the past, this would ...

Adoption of RISC-V processors is accelerating. This technology, like everything, comes with benefits and risks. The open standard means freedom for many developers, but success depends on the ...

The 2024 RISC-V Summit North America marked a significant milestone for the RISC-V community with the ratification of the RVA23 Profile. This event signifies a major step forward in the evolution of ...

SiFive, a RISC-V processor design firm, unveiled two new chip designs aimed at bringing a high-performance computing solution to various industries. The announcement of the SiFive Performance P870 and ...

The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...

CUPERTINO, Calif.--(BUSINESS WIRE)--Ventana Micro Systems Inc., a company developing high-performance data center class RISC-V processors, today announced that the company has raised $38 million in ...

RISC-V is an open-source Instruction Set Architecture (ISA) that rapidly transforms the CPU design and development landscape. Unlike proprietary ISAs, RISC-V allows free access to architecture ...

Why it matters: RISC V pioneer SiFive has gone through several iterations, but has now solidified a business model that essentially positions it as a direct competitor to Arm. If they can continue to ...