EDN

Free phase-locked loop (PLL) analysis software

Editor's Note: Although the primary target market for the 86100CU-400 application presented below is for ASIC/SoC designs, I'm assured by the folks at Agilent that this application is also applicable ...
EDN

Phase-Locked Loop Applications

This application note discusses phase frequency detector characteristics that affect phase-locked loop (PLL) dead band and jitter performance. In PLLs that employ charge pump loop filter designs the ...
Electronic Design

All digital phase-locked loop offers sub-mW power consumption

San Francisco, CA. At the 2017 International Solid-State Circuits Conference in San Francisco, imec, Holst Centre, and ROHM presented an all-digital phase-locked loop (ADPLL) for Internet-of-Things ...
Hackaday

Learn Something About Phase Locked Loops

You can see the videos below. The clever part of a PLL can be found in how it looks at the phase of two signals. For signals to be totally in phase, they must be at the same frequency and also must ...
Electronic Design

Driving the VCO in High-Voltage, High-Frequency Phase-Locked Loops

A phase-locked loop (PLL) is a feedback system that combines a voltage-controlled oscillator (VCO) and a phase detector in such a way that the oscillator signal tracks an applied frequency or ...
Nature

Radiation-Hardened Phase-Locked Loop Circuits

Radiation-hardened phase-locked loop (PLL) circuits represent a critical advancement in safeguarding electronic systems against the deleterious effects of ionising radiation. These circuits are ...
TechRepublic

Fractional N-Phase Locked Loop using VLSI Technology

Literature survey of phase locked loop reflects that many researchers have applied different techniques like digital and analog simulation by applying mathematical/logical relations to design the ...
Design-Reuse

True Circuits Introduces New Line of Phase-Locked Loop Hard Macros; Significantly Smaller PLL Sizes Achieved Without Sacrificing Performance

LOS ALTOS, Calif.--(BUSINESS WIRE)--June 8, 2004-- True Circuits, Inc. (TCI), a leading provider of analog and mixed-signal intellectual property (IP) for the semiconductor, systems and electronics ...
Science Daily

Digital phase-locked loop achieves a power consumption of 0.265 mW

Scientists have developed an advanced phase-locked loop (PLL) frequency synthesizer that can drastically cut power consumption. This digital PLL could be an attractive building block for Bluetooth Low ...
EurekAlert!

Digital PLL achieves a power consumption of 0.265 mW

Scientists at Tokyo Institute of Technology have developed an advanced phase-locked loop[1] (PLL) frequency synthesizer that can drastically cut power consumption. This digital PLL could be an ...
Hackaday

phase-locked loop

That big grandfather clock in the library might be an impressive piece of mechanical ingenuity, and an even better example of fine cabinetry, but we’d expect that the accuracy of a pendulum timepiece ...