Design-Reuse

New PCI bridge and memory controller cores take connectivity to board level for user-customizable processor

Elstree, UK, 03 December 2001 -- New PCI host bridge and memory controller interface intellectual property (IP) cores are now available for the ARCtangent[tm]-A4 processor, a leading user-customizable ...
EDN

DDR3 memory interface controller IP speeds data processing applications

DDR3 memory systems can provide a significant performance boost to a variety of data processing applications. However, compared to previous generations (DDR and DDR2), DDR3 memory devices have some ...
Design-Reuse

Integrating a PCI Express Digital IP Core into a Gigabit Ethernet Controller

A Gigabit Ethernet controller incorporating a PCI Express interface takes advantage of the high-throughput, low latency capabilities of PCI Express to deliver true gigabit performance. These enhanced ...
EDN

PCI Express DMA Reference Design Using External Memory

The PCI Express DMA reference design using external memory highlights the performance of the Intel Arria V, Arria 10, Cyclone V and Stratix V Hard IP for PCI Express using the Avalon Memory-Mapped ...
The Next Platform

The CXL Roadmap Opens Up The Memory Hierarchy

The system world would have been a simpler place if InfiniBand had fulfilled its original promise as a universal fabric interconnect for linking all manner of devices together within a system and ...
TechSpot

AMD Ryzen 3000 series memory controller can overclock up to DDR4 5000 MHz

As we edge closer to the launch of AMD's Ryzen 3000 series we are learning more details about some of the new features it will offer. The latest of which is that the Zen 2 architecture will be able to ...