EDN

Flip-Flop Using CMOS NAND Gates

Using just two NAND or inverter gates its possible to build a D type (or ‘toggle’) flip-flop with a push-button input. At power-up the output of gate N2 is at a logical ‘1’, ensuring that transistor T2 ...
Electronic Design

Six MOSFETs, Four Pins Create Two-Input Combo NAND/NOR Gate

This CMOS two-input combination NAND/NOR gate is a three-input, fourpin logic gate. A p-channel enhancementtype MOSFET (Q1) and an n-channel enhancement-type MOSFET (Q4) form one complementary ...
EDN

Implementing and Converting Logic Circuits Using Only NAND or NOR Gates

This is going to be a column that’s divided into three sections. It’s based on a question that a student posed in the EEWeb forums, and he also sent it directly to yours truly. The core of this ...
Semiconductor Engineering

Models for Both Strained and Unstrained GAA FETs Using Neural Networks

A new technical paper titled “Impact of Strain on Sub-3 nm Gate-all-Around CMOS Logic Circuit Performance Using a Neural Compact Modeling Approach” was published by researchers at Hanyang University ...
GIGAZINE

'Nand Game' review to assemble a circuit from scratch using a NAND gate

The screen of NandGame looks like this. We will install a NAND gate on the purple board and build a new circuit. The explanation of the circuit to be assembled is written on the left. The language can ...