Electronic Design

Simplified High-k/Metal-Gate Process Increases Planar CMOS Speed

IMEC, the Belgium-based nanotechnology research center, announced at this week's VLSI Symposium that it has improved the performance of its planar CMOS using hafnium-based, high-k dielectrics and ...
EDN

IMEC outlines nickel-silicide metal-gate CMOS

LONDON — Belgian research organization IMEC has presented on a scheme to use fully-silicided (FUSI) nickel-silicide metal gates with high-k dielectric CMOS transistors at the International Electron ...
EDN

IMEC Extends High-K Program with Metal Gate Stacks

R&D center IMEC has extended its industrial affiliation program (IIAP) on high-k dielectrics for sub-65nm devices to provide solutions for the implementation of metal gate stacks in planar scaled CMOS ...
Nanowerk

Study to avoid stress impact of 3D stacking on IC performance

(Nanowerk News) At IEDM 2010, imec and its partners presented a study of the stress-induced impact of through-silicon via (TSV) processing on the performance of high-k/metal-gate CMOS transistors and ...
Design-Reuse

A Look at Metal eFuses

TechInsights reverse engineers chips to understand how they are made and in some cases why certain structures are the way they are. This article examines two electrically blown fuse structures (eFuse) ...