Semiconductor Engineering

Setting The Memory Controller Free From Managing DRAM Maintenance Ops (ETH Zurich)

A new technical paper titled “A Case for Self-Managing DRAM Chips: Improving Performance, Efficiency, Reliability, and Security via Autonomous in-DRAM Maintenance Operations” was published by ...
EDN

Building a better memory controller: architectural performance exploration of an AXI memory controller

Communicationbetween processors and memories is often a major bottleneck, making the designof the memory controller a critical task in determining overall system-levelperformance. The memory ...
EDN

Implementing custom DDR and DDR2 SDRAM external memory interfaces in FPGAs (part 2)

Note: This is the second part of a two-part article covers the remaining steps to implement DDR or DDR2 external memory interfaces (EMIFs) using FPGAs via ALTDLL and ALTDQ_DQS megafunctions. Steps 4 ” ...
Semiconductor Engineering

Memory VIP

As the consumer market, and the mobile segment in particular, continues to demand more features and more performance in their gadgets, the designer community is confronted with myriad challenges of ...
Design-Reuse

Micronas Licenses MOSAID 90nm DDR/DDR2 Memory Controller Solution

OTTAWA, Ontario, Canada – April 25, 2006 - MOSAID Technologies Incorporated (TSX: MSD) announced today that Micronas GmbH has licensed the MOSAID 90nm DDR/DDR2 memory controller solution for use in ...
Yahoo Finance

Montage Technology Introduces CXL® 3.1 Memory eXpander Controller to Empower Next-Generation Data Center Infrastructure

GUANGDONG HENGQIN, China, September 01, 2025--(BUSINESS WIRE)--Montage Technology today announced the launch of its CXL ® 3.1 Memory eXpander Controller (MXC, Part No. M88MX6852), now in sampling ...