As integrated circuit (IC) designs have grown in complexity, scale and speed requirements, design rule checking (DRC) has evolved from a routine step into a critical pillar of successful tapeouts.
At one time, the relationship between logic designers and physical implementation specialists was simpler. Front-end designers had long been accustomed to providing their ASIC vendors with a ...
Between the complexity of advanced node design verification and the competition to be first to the market, system-on-chip (SoC) designers no longer have the luxury of waiting until each sub-block of a ...
Traditionally, formal verification is used after the fact for bug hunting or design-rule checking. It has yet to be applied up front, where it would affect design decisions at the RTL coding stage.
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