Design-Reuse

Synopsys' DesignWare DDR PHY Compiler Eases Integration of Memory Interface IP

MOUNTAIN VIEW, Calif., Jan. 26, 2011-- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the immediate ...
Design-Reuse

DDR PHY Interface Specification to be Unveiled Next Week at MemCon

ARM, Denali, Intel, Rambus, Samsung, and Synopsys team on specification to address development challenges for DDR-DRAM memory systems PALO ALTO, Calif. -- Sept. 6, 2006 -- Denali Software, Inc., today ...
EDN

Synopsys DesignWare DDR multiPHY IP Supports Six DDR Standards in a Single PHY

MOUNTAIN VIEW, Calif., April 7 /PRNewswire-FirstCall/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and ...
Business Wire

Faraday Delivers DDR/LPDDR Combo PHY IP Solutions on UMC’s 22ULP and 14FFC

HSINCHU, Taiwan--(BUSINESS WIRE)--Faraday Technology Corporation (TWSE: 3035), a leading ASIC design and IP provider, today announced the availability of its DDR/LPDDR combo PHY, supporting from 3 rd ...