Extraction Fusion and DRC Fusion technologies reduce the time it takes to achieve analog design closure. Extraction Fusion enables layout parasitics to be extracted from a partially completed layout.

FineSim SPICE 2018.09 delivers 3X faster runtime for analog circuits, adds RF analysis features Custom Compiler's Extraction Fusion with StarRC provides early parasitics for accurate pre-layout ...

Samsung Foundry has adopted Custom Compiler to its internal IP designers to accelerate design of mixed-signal IP for 5LPE Synopsys Custom Design Platform is the first custom design solution to be ...

MOUNTAIN VIEW, Calif. -- Oct. 24, 2016 -- Synopsys, Inc. (Nasdaq: SNPS) today announced that its Custom Compiler ™ tool has been certified by Samsung Electronics Co., Ltd. to support their ...

Synopsys, Inc. (Nasdaq: SNPS) and United Microelectronics Corporation (NYSE: UMC; TWSE: 2303) (UMC) today announced that the two companies have worked together to enable Synopsys Custom Compiler and ...

Synopsys has announced that STMicroelectronics is deploying Custom Compiler for custom design, initially starting with 28nm FD-SOI IP development. After an extensive evaluation and qualification for ...

In this 7th video of the series, Kai Wang, Director of Engineering at Synopsys, discusses in-design electrical analysis, and why it is critical to use signoff engines to check and fix resistance, ...

New Extraction Fusion and DRC Fusion technologies enable tighter design/layout collaboration and fewer late-stage design iterations Visually-assisted automation proven to deliver 2-10X better ...