EDN

Bridging Xilinx Streaming Video Interface with the AXI4-Stream Protocol

The ARM® core AMBA® specification (version 4.0) AXI interconnect standard includes three Advanced eXtensible Interface version 4 (AXI4) interconnect protocols—AXI4 interconnect, AXI4-Lite protocol, ...
Design-Reuse

Synopsys Introduces the Industry's First Verification IPs for Arm AMBA 5 AXI-J and APB-E

Arm recently announced the availability of the next iteration of the Arm® AMBA® 5 AXI and APB – AXI Issue J (AXI-J) and APB issue E (APB-E). These new specifications introduce several exciting ...
Design-Reuse

Accelerated SoC Verification with Synopsys Discovery VIP for the ARM AMBA 4 ACE Protocol

— As the complexity and number of processor cores in SoC designs increase, so do the verification challenges. One such challenge is verifying hardware-based cache coherency protocols used by these ...
EDN

Self-timed interconnect solution supports AXI bus protocol

SAN FRANCISCO — EDA and intellectual property (IP) startup Silistix Ltd. has added support for the on-chip AMBA AXI bus protocol to the company's synthesized self-timed interconnect technology, ...